The present invention relates to a carrier phase lock detecting apparatus in a PSK-modulated signal receiver for a satellite communication system.
In a satellite communication system, a carrier frequency used thereof inherently becomes to have offset due to a doppler shift, a drift of the local oscillator and/or residues in the automatic frequency control (AFC) on an earth side or on a satellite side. Especially, since a satellite earth station is usually intended to be reduced in size and price, a less stable oscillator is applied, thus, inviting greater offset in the carrier frequency. Accordingly, in a receiver, various measures have been taken to achieve quick carrier frequency-and-phase acquisition to cope with such frequency offset. For instance, a phase-locked loop (PLL) circuit, which is extensively used for carrier recovery in the receiver, is so configured that a voltage-controlled oscillator (VCO) in the PLL circuit, which outputs a reference carrier signal, is swept by frequency control until an incoming carrier is caught. Thus, even in the presence of a carrier frequency offset, carrier acquisition becomes possible. Further, to make a phase-locked time short and to cope with the carrier frequency offset, the PLL circuit is designed to have a widened loop bandwidth for the carrier acquisition period and, after the carrier acquisition, the loop bandwidth is switched to have a narrower bandwidth so as to facilitate keeping the carrier acquisition against a noise.
In a mobile satellite communication system, shadowing of receiving signals caused by buildings and other obstacles on a transmission path further invites erroneous operation in the VCO. Therefore, it is necessary to detect occurrence of the shadowing quickly as possible and thus to inhibit the control of the VCO on the basis of an erroneous phase difference detection signal during the shadowing period.
In order to switch the aforementioned loop-bandwidth in the PLL circuit and detect the shadowing in the mobile satellite communication, a carrier phase lock detecting function is provided to detect carrier phase lock condition. FIG. 1 show a conventional PSK-modulated signal receiver including a prior art carrier phase lock detecting apparatus.
In FIG. 1, a PLL circuit arrangement including a VCO 1, a demodulator 2, a phase detector 3 and a loop filter 4 demodulates an incoming PSK-modulated signal and delivers demodulated data. For carrier phase lock detection, a unique word (UW) detecting circuit 5 and a frame synchronization circuit 6 are used. Thus, the frame synchronization signal from the circuit 6 is applied as a carrier phase lock detection signal to a frequency sweep control circuit 7. When frame synchronization is established, the sweep control circuit 7 stops the sweep operation for the VCO 1. In this figure, an adder 8 adds the control signals from the loop filter 4 and the sweep control circuit 7. There also is a method utilizing forward error correction (FEC) technique for carrier phase lock detection.
According to prior art carrier phase lock detecting apparatus described above, there are the following a disadvantages. As to the prior art utilizing the UW detecting circuit, it takes a long time for carrier phase lock detection since a frame unit including a UW is generally arranged to have mass of a lot of bits. Further, in a mobile satellite communication system, data involving the UW are interleaved in long frame units for the purpose of diffusing burst errors, which are caused by the shadowing. In this case, frame synchronization is judged by detecting the interleaved UW in the frames. Therefore, the prior art carrier phase lock detecting apparatus utilizing the UW detecting circuit requires a longer time for carrier phase lock detection in the mobile satellite communication system. Incidentally, the interleaving frame length is determined by a shadowing time and a received power variation period. The other disadvantages are that the prior art utilizing the UW detecting circuit requires a complicated circuit configuration and that the UW detecting circuit and the frame synchronization circuit are additionally needed to a demodulating circuit configuration.
On the other hand, the prior art utilizing the FEC technique also has a disadvantage requiring a longer time for carrier phase lock detection because the FEC technique requires redundancy information for error correction.
Consequently, the prior art carrier phase lock detecting apparatus can not perform carrier phase lock detection in the desirably quick time.